Challenge 2019 Solution #2: Combined Data Transfer Response Time and Mapping Exploration in MPSoCs

The 2019 industrial challenge and its solutions to be presented at WATERS'19
Post Reply
pagetti
Posts: 23
Joined: Thu Jul 02, 2015

Challenge 2019 Solution #2: Combined Data Transfer Response Time and Mapping Exploration in MPSoCs

Post by pagetti » Mon Jun 17, 2019

Title: Combined Data Transfer Response Time and Mapping Exploration in MPSoCs
Authors: Alexander Diewald, Simon Barner and Selma Saidi

Alexander_Diewald
Posts: 2
Joined: Thu May 23, 2019

Re: Challenge 2019 Solution #2: Combined Data Transfer Response Time and Mapping Exploration in MPSoCs

Post by Alexander_Diewald » Wed Jun 26, 2019

Dear all,

please find our approach to address the challenge in the attached pdf file.
Also, a big thanks to the organizers for all the efforts and provisioning the challenge.


Best regards,

Alexander Diewald, Simon Barner and Selma Saidi
Attachments
FinalVersion.pdf
(1.08 MiB) Downloaded 458 times

Alexander_Diewald
Posts: 2
Joined: Thu May 23, 2019

Re: Challenge 2019 Solution #2: Combined Data Transfer Response Time and Mapping Exploration in MPSoCs

Post by Alexander_Diewald » Mon Jul 29, 2019

Dear all,

please excuse the late upload of the slides presented at the WATERS'19 workshop. They are attached.
Note that slide 5 and 7 originally contained animations, so please excuse the slighly wrong layout.

Best regards,

Alexander Diewald
Attachments
waters2019.pdf
(2.38 MiB) Downloaded 383 times

Post Reply