Extending an Automated Testing Framework to Support Agile eXtreme Programming Development Concepts
Posted: Wed Jun 07, 2017
Title: Extending an Automated Testing Framework to Support Agile eXtreme Programming Development Concepts in an Embedded Real-Time Environment
Authors:
Militina Gorobets, Albert Tran, Michael Smith (Department of Electrical and Computer Engineering, University of Calgary)
James Miller (Department of Electrical and Computer Engineering, University of Alberta)
Abstract: Automated testing frameworks provide a useful tool whether employing test-last or Agile eXtreme Programming test driven development test-first approaches. Additional consideration of how the testing framework’s performance may generate false positive or negative test results becomes important when an embedded system’s real-time performance must be taken into account. In this paper, we consider the advantages and disadvantages of two tools to improve the framework’s performance by co-opting, and extending, on-chip hardware performance monitors to enhance Embedded-Agile development. We discuss providing faster full code test coverage analysis and low-overhead live black-box and white-box testing using a FPGA-based test insertion co-processor. The co-processor development was used as a test bench for exploring FPGA-Agile development
Attached paper:
Authors:
Militina Gorobets, Albert Tran, Michael Smith (Department of Electrical and Computer Engineering, University of Calgary)
James Miller (Department of Electrical and Computer Engineering, University of Alberta)
Abstract: Automated testing frameworks provide a useful tool whether employing test-last or Agile eXtreme Programming test driven development test-first approaches. Additional consideration of how the testing framework’s performance may generate false positive or negative test results becomes important when an embedded system’s real-time performance must be taken into account. In this paper, we consider the advantages and disadvantages of two tools to improve the framework’s performance by co-opting, and extending, on-chip hardware performance monitors to enhance Embedded-Agile development. We discuss providing faster full code test coverage analysis and low-overhead live black-box and white-box testing using a FPGA-based test insertion co-processor. The co-processor development was used as a test bench for exploring FPGA-Agile development
Attached paper: